NPU vs TPU: What Is the Difference?

The difference between an NPU and a TPU is mostly one of naming. NPU is a category, like GPU, and most new laptop, embedded and edge processors include one. TPU is a product line from one company, Google. Both are AI accelerators that run the matrix maths of neural networks far more efficiently than a CPU. In practice, edge computers use the NPU in their processor, and the choice comes down to which vendor’s toolkit can run the model.

For an edge computer, the question is usually which NPU, not NPU or TPU. Cloud TPUs are only available as a Google Cloud service, and the Edge TPU is a small, older device chip.

A neural processing unit is a block of AI hardware inside a processor, beside the CPU cores and graphics. It runs inference on quantized models, typically INT8 or INT4, at a few watts, which leaves the CPU and GPU free. Each chipmaker has its own design and software.

A TPU, or tensor processing unit, is an AI accelerator chip that Google designs to run neural networks. A tensor is the multi-dimensional array of numbers that a model works on, and the chip is built around large matrix multiply engines, each arranged as a systolic array, that pass data from one arithmetic cell to the next without returning to memory each time. That makes it very efficient at the multiply-and-add work of AI, and of little use for anything else.

Google designed the tensor processing unit for its own data centres and first used it internally in 2015. Cloud TPUs are large chips grouped into pods of thousands, used to train and serve models such as Google’s Gemini, and rented through Google Cloud. Google has released several generations, each adding memory and interconnect for larger models. They are programmed through TensorFlow, JAX and PyTorch.

The Edge TPU is a different, much smaller chip that Google sold under the Coral brand on USB sticks, M.2 cards and boards. It runs about 4 TOPS at INT8 on around 2 W, and it needs TensorFlow Lite models fully quantized to INT8 and compiled for it. Google’s own Pixel phones also carry a TPU inside their Tensor processors.

The first TPU ran inference only, at INT8. Later generations added training, faster interconnect and much more high-bandwidth memory, through v4 and v5 to Trillium in 2024 and Ironwood in 2025. The name also belongs to an unrelated plastic, thermoplastic polyurethane, so “TPU” search results often mix chips with phone cases and 3D printing filament.

People comparing the two usually have a GPU in mind as well, so all three are set out below.

For most edge projects the real comparison is between the NPU already in the processor and a GPU, covered in our guide to GPU vs NPU for edge AI.

Neither chip runs a model straight from a training framework. For the Edge TPU, a TensorFlow model is fully quantized to INT8 and passed through Google’s Edge TPU Compiler; any layer the compiler cannot map falls back to the CPU, which can slow the whole model down. Cloud TPUs take TensorFlow, JAX or PyTorch code directly through Google’s XLA compiler, at full or reduced precision.

NPUs work the same way through their own vendor tools. Intel’s OpenVINO, AMD’s Ryzen AI software and Qualcomm’s AI Engine Direct each convert and quantize a model, usually from ONNX, and place the supported layers on the NPU. The practical test for any of them is the same: run your own model through the toolchain and check which layers land on the accelerator and how accurate the result is.

For an industrial or edge computer, an NPU is the practical choice in almost every case. It comes with the processor, needs no extra slot or power, and is supported for the life of that processor. Our NPU guide explains how on-chip AI works, and our edge AI computers cover Intel, AMD and Arm processors with built-in NPUs, from Intel Core Ultra computers to AMD Ryzen AI 300 systems.

Where an NPU is not enough, the next step is usually a dedicated accelerator module, a Jetson or a GPU rather than an Edge TPU, because those have current software and long availability. Cloud TPUs remain useful for training the model that the NPU later runs.

We build edge computers around the NPU, accelerator or GPU the model needs, with the runtime and drivers installed and validated as standard before they ship.