What Is PCIe 6.0?

PCIe 6.0 is the sixth generation of PCI Express, the interface that connects GPUs, SSDs, network adapters and accelerators to a processor. PCI-SIG released the specification in January 2022. It doubles the per-lane rate of PCIe 5.0 from 32 to 64 gigatransfers per second (GT/s), keeping the PCIe tradition of twice the bandwidth every generation.

The way it gets there is different. Every earlier generation doubled the rate by doubling the signaling frequency. PCIe 6.0 keeps roughly the same frequency as PCIe 5.0 and instead sends two bits per symbol, using four voltage levels (PAM4) instead of two. That change brought a new packet format, called FLIT mode, and built-in forward error correction, because four closely spaced levels are more prone to errors.

The result is about 7.6 GB/s of usable bandwidth per lane in each direction, or about 121 GB/s each way on an x16 link. PCI-SIG quotes the raw figure as 256 GB/s for an x16 link in both directions combined.

Four features carry most of the change from PCIe 5.0.

PCIe 6.0 is the first generation to change the signaling scheme since PCIe 1.0. The x16 figures are per direction after encoding or FLIT overhead.

The same lane widths apply as before, from x1 to x16, and the card edge connector is unchanged, so PCIe 6.0 slots look like any other PCIe slot.

A PCIe specification always lands years before mass-market hardware, and PCIe 6.0 took longer than usual. PAM4 needed new controller designs, signal processing, retimers and an entirely new compliance test program, and PCI-SIG’s first interoperability testing at 64 GT/s only took place in 2025.

The first products are data-centre parts. AMD’s 6th Gen EPYC (Venice) and NVIDIA’s Vera CPU are announced with PCIe 6.0 support, enterprise SSDs such as Micron’s 9650 and Samsung’s PM1763 use a PCIe 6.0 interface, and switch and network-adapter makers have PCIe 6.0 parts for AI clusters. Compute Express Link 3.x also runs over the PCIe 6.0 physical layer.

Desktop and embedded processors are still on PCIe 5.0 or 4.0, and there are no PCIe 6.0 motherboards for desktop or industrial use yet. The current data centre GPUs we supply connect at PCIe 5.0, and the GPU systems in our rack mount servers range use PCIe 5.0 or 4.0 slots, which remains the practical ceiling for edge systems for now.

Yes. PCIe 6.0 slots and devices work with every earlier generation. When a PCIe 6.0 device meets a PCIe 5.0 slot, or the reverse, the link trains to PCIe 5.0 and uses NRZ signaling. FLIT mode is only used when both ends run at PCIe 6.0.

What does change is the board design. Higher rates shorten how far a signal can travel on a circuit board, so PCIe 6.0 systems lean more on retimers, cabled connections to the slots and careful riser card design than earlier generations.

For most edge computers, PCIe 6.0 is a roadmap item rather than a buying decision. Gateways, panel PCs and machine controllers rarely use more than a few lanes of PCIe 3.0 or 4.0. Edge AI servers with one or two GPUs and Gen 5 NVMe drives are well served by PCIe 5.0 today.

Where it will matter first is in multi-GPU AI servers, 800 Gb/s networking and high-capacity NVMe storage, where PCIe 5.0 x16 is already the bottleneck. For long-life industrial programs, the usual approach applies: choose the generation the processor supports today, check that the PCIe expansion cards and SSDs you need are available for it, and plan the move to PCIe 6.0 when industrial boards adopt it.

Beyond PCIe 6.0, PCI-SIG released PCIe 7.0 in 2025 at 128 GT/s, and has started work on PCIe 8.0, targeting 256 GT/s.

We specify each build around the PCIe generation its processor supports and check that every card and SSD runs at its full rate before the system ships.